CS4364-CQZR【PDF 28/50 页】IC DAC 103DB 24BIT 6CH 48-LQFP

收藏本站

您好，
买卖IC网欢迎您。
请登录
免费注册

买卖IC网

Sheet目录1991

24页 25页 26页 27页 [28页]29页 30页 31页 32页

DS619F1

CS4364

6.2.3

PCM/DSD Selection (DSD/PCM)

Default = 0

0 - PCM

1 - DSD

Function:

This function selects DSD or PCM Mode. The appropriate data and clocks should be present before

changing modes, or else MUTE should be selected.

6.2.4

DAC Pair Disable (DACx_DIS)

Default = 0

0 - DAC Pair x Enabled

1 - DAC Pair x Disabled

Function:

When the bit is set, the respective DAC channel pair (AOUTAx and AOUTBx) will remain in a reset state.

It is advised that changes to these bits be made while the power-down (PDN) bit is enabled to eliminate

the possibility of audible artifacts.

6.2.5

Power Down (PDN)

Default = 1

0 - Disabled

1 - Enabled

Function:

The entire device will enter a low-power state when this function is enabled, and the contents of the control

registers are retained in this mode. The power-down bit defaults to ‘enabled’ on power-up and must be

disabled before normal operation in Control Port Mode can occur.

6.3

PCM Control (Address 03h)

6.3.1

Digital Interface Format (DIF)

Default = 0000 - Format 0 (Left Justified, up to 24-bit data)

Function:

These bits select the interface format for the serial audio input. The DSD/PCM bit determines whether

PCM or DSD Mode is selected.

The required relationship between the Left/Right clock, serial clock and serial data is defined by the Digital

Interface Format and the options are detailed in Figures 8-15.

Note:

While in PCM Mode, the DIF bits should only be changed when the power-down (PDN) bit is set

to ensure proper switching from one mode to another.

543

DIF3

DIF2

DIF1

DIF0

Reserved

FM1

FM0

000

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

采购需求

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

我的联系方式